## 2 Answers

__Overflow condition in $2's$ complement number system:-__

- $c_{3} = 1,c_{4} = 1\implies$ No overflow
- $c_{3} = 0,c_{4} = 0\implies$ No overflow
- $c_{3} = 1,c_{4} = 0\implies$ Overflow $(a_{3} = b_{3} = 0)$
- $c_{3} = 0,c_{4} = 1\implies$ Overflow $(a_{3} = b_{3} = 1)$

We can conclude that the overflow condition for $2's$ complement number system is: $$c_{3}\oplus c_{4} = 1\\ \text{(OR)} \\ \bar{a_{3}}\cdot \bar{b_{3}}\cdot s_{3} + a_{3}\cdot b_{3}\cdot\bar{s_{3}} = 1$$

Here, we used $4-bit$ binary full adder and Ex-OR gate.

The Ex-OR gate is used to check the overflow condition.

### 10 Comments

@PratikDey0316

I think, for the second part of the overflow condition it basically says that, since a3 and b3 bits are sign bit so if two positive number are being added(sign bit is 0) then their result cannot be negative(s3 cannot be 1), Similarly, when two negative numbers are being added(sign bit is 1) then their result cannot be positive(s3 cannot be 0). If I am wrong here then please correct me.

As for the first part of the overflow condition you can refer this link: http://sandbox.mc.edu/~bennet/cs110/tc/orules.html

The Ex-OR gate is used to differentiate b/w normal binary addition vs 2’s complement addition.

ref:- https://www.ijert.org/efficient-design-of-2s-complement-addersubtractor-using-qca-2